VarioTAP is a revolutionary technology for pattern streaming on TAP (Test Access Port) signals compliant with IEEE Std. 1149.1.
The technology utilizes on-chip emulation resources accessible in many micro-processors and micro-controllers through a IEEE 1149.1 compatible JTAG Port.
The VarioTAP principle was specifically developed for the integrated Boundary Scan software, SYSTEM CASCON™, and enables the complete fusion of Emulation tools with test and In-System-Programming (ISP) applications.
The VarioTAP specific adaptive streaming showcases the dynamic synthesis of Emulation vectors and Boundary Scan vectors, supporting new test strategies such as Interlaced JTAG/Boundary Scan Tests and In-System Emulation Test / ISP.
The VarioTAP technology and its integration in SYSTEM CASCON™ sets new standards for the combination of JTAG Emulation and Boundary Scan in regard to flexibility, modularity, and performance:
Boundary Scan test operations executes in conjunction with Emulation tests (Interlaced JTAG/Boundary Scan)
High Speed On-Chip Flash Programming
Ultra fast programming of FLASH devices external to the µP
Full automated support of Scan Router devices from all leading vendors for In-System applications
Complete integration in SYSTEM CASCON allows interactions with other tools (e.g. the “2008 Best In Test” ScanAssist Debugger)
Utilization of the UUT's existing Boundary Scan project database for process automation
Support of Multi-Processor /Multi-Core systems with one or multiple TAP
Extremely simple user interface utilizing VarioTAP models with pre-configured IP (Intellectual Property)
Allows functional tests and At-Speed test for non-Boundary Scan components (digital/analog)
Simple generation of custom tests without native tool chain for the particular µP family
Simple implementation of existing µP routines for specific test functions, with interaction of Boundary Scan test, ISP, Emulation, and external I/O operations in one application
Single platform for development and implementation of multi-mode test and programming strategies
Fully compatible with hardware platform SCANFLEX® and all ScanBooster™ controllers
No need for µP specific Pods
No need for µP specific knowledge
Simple extension of existing installations and projects
Minimal learning curve for this new technology
Dramatic increase in test coverage even if Design For Test (DFT) quality is limited
Highly efficient project development for extended JTAG/Boundary Scan application
No need for other multiple software and hardware tools for specific µP families and applications (such as emulators exclusively for FLASH programming of a specific type of µP)
Highest flexibility when implementing new test and ISP strategies
Support of complex multi-processor designs (e.g. with 8 different µP types in 8 different scan chains).