Testing Technics - Jtag / Boundary Scan, Cable and Backplane.
JTAG / BOUNDARY SCAN
Jtag is a standard of testing digital or combined boards that was founded in 1991 by cooperation of companies that produce components and companies that manufacture Automatic Test Equipment.
Since that the software was developed and now it allows additional testing which enables testing wider parts of the PCB - Cluster tests, Memory tests and burning for all CPLD, FPGA, EEPROM and Flash components.
For additional information you can read the following article -Introduction to Boundary Scan
Cables and Backplane Testing
Cables testing systems for civilian standards and all military standards are done with Cable Test systems which are testing very efficiently high and low voltage.
Backplane testing is done using the regular system in which cables are connecting between the UUT and the test points of the tester. There is another method - Daisy Chain in which the switching points are located on the carrier adapter boards. Then, only one cable is connecting the tester with the tested backplan and there is one small cable that connects the carrier boards to one another.